Jack retweeted

James Talarico@jamestalarico4 Sep 2010
United States
United StatesConnected via United States App StoreAccount-level information, not a live location or per-post device.
Thank God for Longhorn Football -- TEXAS FIGHT!
Jack retweeted
Can security escort Ted Cruz out of the stadium right this instant!!!
#OSUvsTEX
Jack retweeted
Big news from SiFive: We're launching five new RISC-V IPs in our 2nd Gen Intelligence lineup to accelerate AI — from far edge IoT to the data center!
- X160 Gen 2
- X180 Gen 2
- X280 / X390 / XM Gen 2
Learn more 👉 sifive.com/press/new-x100-se… #NoLimits
Jack retweeted
Mill v1.0.0 is out: a better build tool for #Java, #Scala, and #Kotlin. Check it out!
mill-build.org/blog/13-mill-…
Jack retweeted
The whitepaper is here! Designed to demystify the current state of #openhardware #opensilicon, outline the challenges ahead, and chart a path forward for everyone from startups to silicon giants.
chipsalliance.org/news/tac-w…
Jack retweeted
It's absolutely crazy to me that the most exciting Scala projects today are actually happening in the hardware RISC-V space with tools like Chisel rather than the traditional, stronghold domains. And, on top of that, they innovate in chip design.
Jack retweeted
We have issued an Evacuation Order due to a Tsunami coming to West Berkeley. nixle.us/FZ3E9
Jack retweeted
For anyone looking, this is the Tsunami risk map for San Francisco on sf72.org
Jack retweeted
.@ElectronicDesgn shares more on the HiFive Premier P550 development board, featuring a quad-core #RISCV SoC, Imagination GPU, and ESWIN NPU, built for next-gen embedded development. Read all about it: hubs.la/Q02VN2Lc0 #NoLimits
Jack retweeted
“If you’re looking to push the boundaries of what’s possible with RISC-V, this could be the test and development platform you’ve been waiting for.” Dave Altavilla shares his take on the SiFive HiFive Premier P550 development board here: hubs.la/Q02VN58C0 #NoLimits
Jack retweeted
📢 The SiFive HiFive Premier P550 development boards are now shipping! Grab one from the initial pre-release batch of 100 Yocto-ready boards via @ArrowGlobal, or wait for the Ubuntu-supported version coming in Q4. Learn more: hubs.la/Q02V6v7H0 #RISCV #NoLimits
Jack retweeted
The SiFive Intelligence X280 is out of this world! ⭐ @MicrochipTech is integrating our X280 64-bit #RISCV cores into the company’s high-performance space-flight computing processor. Read more via @ElectronicsNews: hubs.la/Q02Hdmk20 #NoLimits
Jack retweeted
DeepComputing is showing an early demo of the new RISC-V Mainboard at the @risc_v Summit in Munich next week. This board uses a @StarFiveTech JH7110 with @SiFive RISC-V CPU cores. DeepComputing is also working closely with the teams at @ubuntu and @fedora on Linux support.
Jack retweeted

Hackster.io@Hacksterio9 Apr 2024
United States
United StatesConnected via United States App StoreAccount-level information, not a live location or per-post device.
.@SiFive unveils the high-performance, AI-accelerating HiFive Premier P550 RISC-V development board. hackster.io/news/sifive-unve…
Jack retweeted
📢 New board alert! The HiFive Premier P550 is the highest performance #RISCV development board in the industry. Available through @ArrowGlobal this board enables developers to test & develop new RISC-V applications. Learn more here: hubs.la/Q02sgxc80 #NoLimits
Jack retweeted
Watch talks from members on collaborative #opensource projects including Open Se Cura, #Caliptra RoT, #Chipyard, #UVM testbenches in #Verilator & using #FuseSoC w/ VeeRwolf: youtube.com/watch?v=_FUw1_f3… @linuxfoundation @risc_v @Google @antmicro @verisilicon @UCBerkeley @OlofKindgren
Jack retweeted
Join the hybrid CHIPS Alliance Technology Update hosted by @Google for talks on #openhardware & collaborative #ASIC / #FPGA development by @intel, @westerndigital, @antmicro, @SiFive and @UMich, following #60DAC. Register: events.linuxfoundation.org/c… @risc_v @linuxfoundation @60thDAC
Jack retweeted
We are delighted to hear that Chipyard, an open source framework for agile development of Chisel-based SoCs developed at UC Berkeley, supports several cores from PULP ecosystem.
youtu.be/pYyv8BJ5n68?t=308
github.com/ucb-bar/chipyard
chipyard.readthedocs.io/en/s…


















