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27 lessons, one working widget each: what an #FPGA is, how numbers become bits, your own t27 spec, how #t27c compiles it, and how it becomes a bitstream on a real board. Then a lab of 3 on our own research.
t27.ai/#/course
Dmitrii Vasilev retweeted
Analog Chip design beginner training in Portugal with open source EDA tools in November.
inl.eventkey.pt/geral/inseri…
Neural networks in t27: 27 lessons, and a widget in each one that runs a specs/ml spec
Course 10 opens the parts the project's agents think with: ReLU, GELU and softmax, embeddings and dropout, pooling and batch norm, MSE, cross-entropy and Huber, SGD,… t27.ai/blog/neural-networks-…
14 of 14 FPGA bench tools pass their own self-tests in one sweep: decode 18/18, repin 17/17, firelog 10/10, tmpcheck, stamps and keep 9/9 each, jtag and seeds PASS.
`tri fpga-tools`, recorded run, real output:
t27.ai/term/tri-fpga-tools/
112 files under /tmp are pinned by sha256 in our specs. /tmp is emptied at boot, and all 112 are gone from it. Every one has a kept copy: 0 lost, 0 not kept, 0 unlocated.
`tri fpga-tmpcheck`, recorded run, real output:
t27.ai/term/tri-fpga-tmpchec…
26 checks of a batched FPGA wire protocol, no board, no RTL: a clean link returns every receipt, no retransmit; 11 loss and fault cases recover; a lie, a duplicate or a wrong-key answer stops the run. PASS.
`tri fpga-batch-rehearsal`, recorded run:
t27.ai/term/tri-fpga-batch/
Before you edit an RTL file, see what the edit touches. trinet_node_core.v is pinned by sha256 in 5 specs, and 5 generators read those specs: radius 5 specs, 1 level. That is the set to re-pin after the edit.
`tri fpga-pins`, recorded run, real output:
t27.ai/term/tri-fpga-pins/
84.4 ms: bitwalk reads all 6 reference bitstreams, best of 5, on a machine at load 28. First the part table in far.t27 is checked against prjxray-db part.json (it matches), then all 6 references answer ok.
`tri x7-part`, `x7-refs`, `x7-bench`, recorded:
t27.ai/term/tri-x7-refs/
LUT explain: a 7-series LUT6 INIT and its FASM line, read as logic
Paste a 64-bit LUT6 INIT or #FASM lines: truth table, minimal expression, the gate's name, what each feature sets. Then guess the gate on 4738 LUTs from a routed design. #FPGA
t27.ai/widgets/lut-explain/
The FPGA bench in one screen: CP2102N UART direct on USB with no hub in the path, Digilent JTAG present, openocd not running, lock free, and the last board runs: three x7-board runs PASS 51,840/51,840.
`tri fpga-status`, recorded run, real output:
t27.ai/term/tri-fpga-status/
TRI CLAW github app. Reviewer bees of the t27 swarm. Approves pull requests and applies the bee-reviewed label under its own identity, so a review is never the author approving itself.
github.com/apps/tri-claw
5 bugs planted in the bitstream packet spec, 5 caught. A flipped CRC polynomial bit, a CRC over 4 address bits not 5, 99 NOOPs not 100, COR0 bit 0 cleared, a type-2 count one short: each mutant rebuilt, re-tested, re-swept.
`tri x7-mutate`, recorded run:
t27.ai/term/tri-x7-mutate/
An 8-bit byte as a 13-bit SECDED word. Flip any bit: the syndrome names it and it is fixed. Flip two: detected, not fixed.
t27.ai/widgets/line-bounce/
Three widgets for the physics under the bus: reflections, a closing eye, an ECC word
A 1 V step from a 25 ohm driver into an open 50 ohm line reaches the far end as 1.333, 0.889, 1.037, 0.988 V before it settles at 1 V; one RC pole leaves a quarter of… t27.ai/blog/three-widgets-un…
From a minute to a second: where the time to build t27 went, and where it still goes
One overnight loop measured every place t27 builds and waits, and fixed what the numbers pointed at. t27.ai/blog/from-a-minute-to…
A 3 MB compiler that turns a spec into #AArch64 code in 5 ms, and where it still loses
#FPGA #t27c #t27b
t27.ai/?lang=en#/blog/a-3-mb…
it executes 3.4x the instructions of gcc -O2 and 4.5x those of zig ReleaseFast, its code is up to 2x larger, and on Linux it is a JIT test runner that cannot yet write an ELF binary. Over the week its share of the reference's passing specs rose from 8.6% to 98.9%.
[measured on a shared Railway lab; run times are qemu emulation, instruction counts are exact; t27b's code is -O0 class] t27b 0.2.0, released with the signed receipt of the very binary it ships, compiles a t27 spec with its tests in about 4.8 ms as a native x86_64 cross-compiler
One command re-checks the 7-series bitstream path: CRC 12/12 over 6 reference bitstreams, ECC 32,520/32,520 frames, FAR walk = Vivado FDRI, pins 82/82, segbits 4,224/4,224, writer 16/16 and fasm 22/22 byte-identical. CLEAN.
`tri x7-audit`, recorded run:
t27.ai/term/tri-x7-audit/