122.a43 retweeted
Since 1985, your computer has asked the network what time it is and simply believed the answer.
Meta's public time service now speaks NTS (Network Time Security, RFC 8915) at nts.meta.com. Every packet is authenticated, so a device can verify the time came from us and wasn't modified in transit. It’s free, public, and open source.
Read the full technical write-up on our Engineering Blog: engineering.fb.com/2026/10/0…
122.a43 retweeted
PTX 9.5 just landed with some interesting new additions -
sin/cos .2pi - Angles can now be supplied in cycles
tensormap.replace .alloc_class - TMA descriptors can explicitly track small/large tensor allocations and query that state
trace.mark + .metadata_section - Kernel code can emit timestamped performance
fabric publish and sync instructions like that of TMA commit_group and wait_group
cp.async.bulk.wait_group.sync_restrict::proxy::async - A narrower async copy wait, that orders prior async proxy accesses against subsequent async proxy without unnecessarily ordering the generic proxy. A weaker ordering in a sense (so it could be more async)?
fence.alias.sync_restrict::read.release.sys - A system scope release fence specifically for prior reads through aliased generic addresses.
%locality_domain_id and %locality_domain_supplemental_sm - Lets a kernel discover which locality domain its cluster was launched on and lets persistent kernels/schedulers distinguish guaranteed locality, domain SMs from supplemental SMs.
This means we can now query the number of domains and SMs per domain, allocate memory inside a particular locality domain, and create a green context whose SMs come from that same domain. I remeber what @pranjalssh is grouping SMs into those two sets, then assigning an A-row to one requester side so its repeated reads build useful residency in only one L2 half. CUDA locality domains now let you request something closer to -
allocate memory in locality domain X
run the kernel on SMs from locality domain X
docs.nvidia.com/cuda/paralle…
122.a43 retweeted
Biggest lesson from steering a swarm of AI agents through a GPU kernel contest: reset agents frequently, prod and steer your supervisor, frequently run external research, and stay on top of costs.
That and eight more lessons from reaching the top 10:
lxe.co/muse-swarm
Top 10 on the Muse Spark Open Kernel Challenge decoder board: 2.47× SGLang
Six Codex agents running in a loop on two spot GPUs.
Claude manages the agents. I manage Claude, mostly by asking why the source file is a massive pile of spaghetti.
Codex lanes each own one piece of the layer: attention, small-token glue, large-token MoE, a fused MoE tail, unexplained results, and an integrator (I ask to rework the lanes a few times a day).
Every attempt is a fresh process that reads a brief, a handoff note and a ledger, so nothing depends on a long context.
Every candidate runs against the current best in paired runs of the official harness on two spot H200s. Measure your noise before trusting: our official scores swing about 1.5% between runs.
One lane owns the main source tree. Lanes work in copies and the integrator merges their wins (14 kept today).
Claude supervisor reads every result, rewrites the briefs, restarts preempted boxes and sends research subagents for gap maps and soak tests.
Oh, also a research agent that finds any tips, tricks, workflows, papers, code on the internet to help.
122.a43 retweeted
We have used Bend2 for the last few weeks. Here is an honest review:
Bend2 is what happens when an inbred type theory autist decides Haskell is for fucking casuals. No type inference. No type classes. No tactics. Want to prove something? Write the fucking proof yourself. Dependent types with absolutely none of the ergonomic bullshit. Also, affine types because apparently full linearity would be too much commitment. The ecosystem is nonexistent, the learning curve is a vertical cliff, and writing trivial programs feels like defending a PhD thesis.
9/10. Still too accessible to JavaScript developers.
122.a43 retweeted
Meet qwenGPU: Qwen3.5-2B with a SIMT GPU inside its weights, 45 compiled layers in front of Qwen’s own, using its Gated DeltaNet layers as registers and memory.
It runs real CUDA in its forward passes. The host compiles the kernel to PTX and loads it, then the model writes every step of the launch itself: every register, branch and memory write.
The GPU has 4-lane warps, a 4-stage pipeline, 15 registers per lane and 126 words of global memory, all held in DeltaNet state. Qwen generates each launch token by token, each record running one machine block for one warp.
122.a43 retweeted
re: @cohere. those guys are (1) building local capabilities and infrastructure, (2) setting up a fast growing business on top of it, (3) attracting and keeping AI talent and expertise at home, (4) targeting a section of the market that is hard and requires a lot of painful process.
you don't like their models? maybe they are not for you. they are not for me, but that does not make them generally bad.
they are doing something pretty great. we should back them up and support them.
122.a43 retweeted
in 2022 the median pytorch github issue was something like “help i cannot into python packaging”
in 2026 the median pytorch github issue is someone reporting a numerical correctness issue complete with the sass dump of an offending cudnn kernel to verify their hypothesis on the root cause





























