@SharcLab

Software/Hardware Co-Design for Intelligence and Efficiency (Sharc) Lab @ Georgia Tech

 Atlanta, Georgia, USA
sharclab.ece.gatech.edu/
Joined May 2023
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With #ICML2023 around the corner, VITA will have a robust presence at Honolulu (12+ of us will fly!). We're thrilled to share our latest findings in #efficient training & #scaling, #graph NN, #LLMs, learning to optimize, and #robustness. Check our #ICML2023 activity at-a-glance:
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Awesome to see this great set of GT colleagues and alumni at FCRC!
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We are thrilled to announce the lineup of inspiring Keynote Speakers who will grace the stage at #60DAC! These industry leaders will share their insights and expertise, leaving you motivated and ready to embrace the future of technology. dac.com/Conference/2023-Keyn…
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Sharc Lab retweeted
HPCA@HpcaArchConf26 May 2023
HPCA 2024 is now live! HPCA 2024 will be held in Edinburgh on March 02-06, 2024! Check out more details on our new website: hpca-conf.org/2024/ #hpca #live #webpage #Edinburgh #comparch
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We’re thrilled to announce the 2023.1 release of the AMD #Vitis unified software platform. Download and start designing today: bit.ly/3Myff0A
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Announcing Conference on Parsimony and Learning (CPAL), a new annual conference for researchers in ML, signal processing, optimization, etc. who study parsimonious, low dimensional structures! (1/5)
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The 2023.1 release of AMD #Vivado ML Edition has arrived, bringing 8% improvement in quality of results. Download the latest release: bit.ly/42a1lHD
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Our PhD student Rishov Sarkar won the Best Paper Runner-Up at FCCM this year! For his work "LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis". Paper: arxiv.org/abs/2304.11219 Code: github.com/sharc-lab/Lightni…
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Our Work Presented: LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis: arxiv.org/abs/2304.11219 DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference: arxiv.org/abs/2304.06831
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Some recent photos of our PI and researchers at FCCM! (The 31st IEEE International Symposium on Field-Programmable Custom Computing Machines)
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We want to show off our in-lab FPGA hardware: - 8 PYNQ Boards with Xilinx Zynq-7000s - 4 Xilinx ZCU102 Dev Boards - 3 Raspberry Pis All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
A table of 3 ZCU102 boards, a rack of 8 PYNQ boards and miscellaneous networking equipment and other hardware.

ALT A table of 3 ZCU102 boards, a rack of 8 PYNQ boards and miscellaneous networking equipment and other hardware.

A close-up image of the rack of PYNQ boards.

ALT A close-up image of the rack of PYNQ boards.

A top-down view of a single ZCU102 board.

ALT A top-down view of a single ZCU102 board.

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Exciting news! We are thrilled to announce the launch of our new Twitter account for Sharc Lab. We work on projects in machine learning, hardware accelerators, and EDA. Follow us for updates on our interdisciplinary research and activities!
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