#opensource, #riscv, #linux, #firmware, #electronics, #FPGA • always@(🏳️‍🌈) • @cetola@mastodon.social

Portland, OR
Joined September 2007
stephano 💾 retweeted
See Antmicro's #opensource toolkit put to work to virtually recreate elements of the original @Tesla #Roadster: Vehicle Management System board firmware running in @renodeio simulation, 3D hardware renders of the Vehicle Display System and Battery Management System boards, and interactive design diagram connecting it all antmicro.com/blog/2024/03/vi… @elonmusk
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stephano 💾 retweeted
Filipova Mantovani of @BSC_CNS gives a call out to @eetimes as a good read on #riscv fallacies in his talk on RISC-V for HPC at #HiPEAC23
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stephano 💾 retweeted
Stephano Cetola of @risc_v sets scene for RISC-V roadmap for high performance computing at @hipeac 2023 conference in Toulouse. #hipeac2023 #riscv #HPC #computing
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Congratulations to the @risc_v award winners! We appreciate all of your contributions to the #RISCV community. Here’s a snapshot of some of our winners; stay tuned for more details. #RISCVSummit
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At the #oneAPI DevSummit @codeplaysoft's @rodburns will discuss next steps for the oneAPI Community Forum. Then, join @stephano as he elaborates on #oneAPI and @risc_v's partnership to accelerate heterogeneous computing and open source solutions. intel.ly/3F6qmv5 #HPC
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.@risc_v’s @Calista_Redmond is in-person at #RISCVDaysTokyo, Japan’s largest physical and online #RISCV event! It’s not too late to sign-up for the hybrid conference, taking place from now through Nov. 18: hubs.la/Q01svFry0 #RISCVeverywhere
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Got to share some @risc_v lessons learned at LF Member Summit. Great to meet with OSS community members to share our experiences, accomplishments, and struggles. Big thank you to the @linuxfoundation events team for making this possible. #RISCVeverywhere
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Very excited for this presentation. The concept has been around for a while but few realize how flexible and robust @OpenEmbeddedOrg and @yoctoproject make containers.
I'm excited to attend Using OpenEmbedded Inside Containers? How and Why? - Drew Moseley, Toradex at Open Source Summit Europe 2022 sched.co/15z70 @sched
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Amazing innovation potential to design for @risc_v supported by @intel Pathfinder pathfinder.intel.com/news/in…
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Big news! At #RISCV Summit China 2022, @alibaba_cloud unveiled Wujian 600, a #RISCV based development platform tailored for the design of SoCs in embedded applications, including home robots, medical imaging, and video conferencing. Read more here: bit.ly/3Kkz75v
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VisionFive 2 SBC crowdfunding starts now! A high performance RISC-V SBC with quad-core CPU and 3D GPU: kickstarter.com/projects/sta… @risc_v
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.@EETimes’ Silicon 100 list of startups to follow in 2022 features 14 amazing #RISCV members!
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stephano 💾 retweeted
"GitHub, which itself is owned by Microsoft, announced on Monday that it plans to support code signing, a sort of digital wax seal, for npm software packages using the code-signing platform Sigstore." wired.com/story/github-code-… #opensource #CyberSecurity
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The @risc_v Board elections are in! Please join me in congratulating and welcoming our elected Board members. riscv.org/blog/2022/08/welco…
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stephano 💾 retweeted
If you or someone you know are interested in #opensource and #AI, we are currently looking for a program manager to support our growing AI and machine learning communities. linuxfoundation.org/JobPosti… #TensorFlow #PyTorch #caffe #jax #opencv #theano
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The (RV32GC) port of @v8js was upstreamed yesterday. This was part of the mentorship program provided by @riscv and the @linuxfoundation. RV32 and RV64 ports are supported by the folks at PLCT Labs, part of CAS. Big thank you to everyone involved here! chromium-review.googlesource…
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