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ASIC Design Silicon Proven
@machdyne topaz
logic destroyer retweeted
I found a bug in another project while vibe coding from the bath but they are very anti-ai so I guess I'll just not fix your bug then...
logic destroyer retweeted
Buy an FPGA. Ruin your life.
get into debt if you must, but buy an FPGA board and get into ASIC design (@tinytapeout)
logic destroyer retweeted
Replying to @splinedrive
Thinking at least it runs Linux better than an STM32F429I-DISCO board (on that STM32F4 board with Linux 6.x and Busybox, I couldn't even run multiple Busybox processes due to very constrained 8MB of RAM)! 😅
I'm from Germany, and I have friends who work in the automotive industry, at Porsche and other companies. They told me, "Oh, that's just public relations." And I replied, "Aha. Can you do the same?"
logic destroyer retweeted
turn off your wifi now! 💥
logic destroyer retweeted
KianV StealthV, my custom quad-core RV32IMA SoC written in SystemVerilog, running Linux SMP on a Digilent Genesys 2.
Four pinned render threads share the work in row blocks: fixed-point 3D transforms, depth-tested triangles and Gouraud shading, directly into the Linux framebuffer.
Six morphing shapes at around 25 FPS, alongside 48 kHz, 16-bit stereo PCM audio through ALSA.
CPU cache coherency, shared memory, framebuffer DMA and audio DMA working together under Linux.
logic destroyer retweeted
A tribute to Stanford — running on KIANV STEALTHV.
My custom SystemVerilog SoC running Linux SMP on an FPGA. Four RV32IMA cores, Sv32 MMU and coherent L1/L2 caches. Still optimizing the L2, but already happy with the results.
Nine Stanford 3D models with up to 6,000 triangles each. Fixed-point rendering, Gouraud shading and a 16-bit Z-buffer at 320×240.
All four cores dynamically share rasterization work in 8-row tiles, while framebuffer DMA and ALSA handle video and EBM audio under Linux.
Models: Stanford Computer Graphics Laboratory / XYZ RGB
Music: EBM Neurostrike by Night_City_Radio
#RISCV #FPGA #SystemVerilog #Linux #SMP
A tribute to Stanford — running on KIANV STEALTHV.
My custom SystemVerilog SoC running Linux SMP on an FPGA. Four RV32IMA cores, Sv32 MMU and coherent L1/L2 caches. Still optimizing the L2, but already happy with the results.
Nine Stanford 3D models with up to 6,000 triangles each. Fixed-point rendering, Gouraud shading and a 16-bit Z-buffer at 320×240.
All four cores dynamically share rasterization work in 8-row tiles, while framebuffer DMA and ALSA handle video and EBM audio under Linux.
Models: Stanford Computer Graphics Laboratory / XYZ RGB
Music: EBM Neurostrike by Night_City_Radio
#RISCV #FPGA #SystemVerilog #Linux #SMP
logic destroyer retweeted
Had fun over the last weeks getting @PrismML's ternary LLMs running on cheap second-hand FPGA boards with LiteX!
Fully open source, decent (not ridiculous😅) performance, and it already helped improve the ecosystem!
Have a look, and try it yourself if you have one of the supported board😙 (Less than $100 for the cheapest one).
github.com/enjoy-digital/tri…
(More boards and recent Bonsai 2 2B, 4B, 9B models coming soon!)
logic destroyer retweeted
KIANV StealthV — my custom quad-core RISC-V Linux SoC, written in SystemVerilog and running on FPGA.
An X-Wing rotates through a moving starfield, zooms across the screen and switches between Gouraud shading, wireframe and points.
No GPU — all 3D rendering runs on the four CPU cores. Four pinned workers handle fixed-point transforms, lighting and rasterization: 6,717 triangles at native 320×240, around 25 FPS on average.
RV32IMA, Sv32, private L1 caches, coherent shared L2, framebuffer DMA and ALSA audio running together under Linux SMP.
Music: Captain — Space Debris.
3D model: Stylized X-Wing by Alexander Günther (sketchfab.com/3d-models/styl…), CC BY 4.0 (creativecommons.org/licenses…), adapted for the renderer.
logic destroyer retweeted
Breaking, Europe announced their new innovation project to show Tesla who is boss.
🤖 Made with AI


















