France
Joined February 2008
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More @risc_v C insights from QCOM: "...we are spending 75% of opcodes on something that improves performance a few percent in some cases, may degrade performance in others, and leaves implementations and design verification with a lot of headaches."
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I've updated my TDX blog post to remove the unfair comments about the AP-TEE RISC-V effort. I was wrong and @fagiolinux was totally right when I he said, that they're doing exactly what I propose. Way to go! 🚀🚀 @rivos x86.lol/generic/2023/02/07/i… #riscv #tee #intel #tdx
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J'ai peut être été trop ambitieux sur le contenu et sa densité, par rapport au temps que nous avions pour le présenter :-/ Si tu as des questions, n'hesite pas!
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We are excited to announce the launch of RISE, under the umbrella of LF Europe. RISE will accelerate the development of #opensource software for RISC-V across a variety of market segments and in support of RISC-V International. Learn more: hubs.la/Q01RFbt00
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