#TSMC is tapping #GlobalFoundries to make silicon interposers in the U.S., easing CoWoS capacity pressure while giving GF a new foothold in the AI chip supply chain—powered by its mature 65nm technology.💡More: pse.is/9qlxz6 🔗

#NVIDIA’s #NVHBM is accelerating the custom HBM era—and giving base dies a much bigger role. #Micron and #Samsung are already rethinking their strategies, putting foundry giant #TSMC increasingly in the spotlight.💡More: pse.is/9qddta 🔗

#CXMT is stepping up its DRAM game! Following its G5 and LPDDR6 mass-production milestones, the Chinese memory maker has unveiled its 4F² architecture, eyeing next-gen DDR5 RDIMMs by year-end.💡More: pse.is/9qkqda 🔗

[Breaking] Intel EMIB Substrate Yields Reportedly Hit 45%, Suppliers Eye 60% by 1Q27 As interest from external customers in Intel’s EMIB (Embedded Multi-die Interconnect Bridge) continues to grow, substrate yields are emerging as a key gauge of its readiness. Industry sources suggest EMIB substrate yields improved to around 45% over the past quarter, with the supply chain targeting 60% by 1Q27. Sources trace the yield improvement back further: yields stood at roughly 30% in 2Q26 before reaching the current ~45% level. The supply chain’s near-term milestones are reportedly 50% by 4Q26 ahead of the 60% target in 1Q27, with Japanese suppliers said to be running more stable than their peers. As explained by Common Wealth Magazine, the yield challenge stems in part from EMIB-T’s architecture. Unlike TSMC’s CoWoS, which uses a silicon interposer, EMIB-T embeds silicon bridges directly into the package substrate, shifting the demanding interconnect integration to substrate suppliers and making their manufacturing capabilities critical to the ramp. For substrate makers, one key challenge is the stark difference in thermal expansion between ABF substrates and silicon bridges, Common Wealth Magazine reports. During repeated high-temperature processing, the bridge must sit precisely in its cavity and remain flush with the substrate surface—but as the two materials expand and contract at different rates, maintaining that alignment is difficult. Adding another layer of complexity is NCF (Non-Conductive Film), a new material applied beneath the TSVs at the bottom of the silicon bridge, the report adds. During bonding, NCF is prone to trapping air bubbles, which can compromise adhesion, according to Common Wealth Magazine. Despite current yield hurdles, customer interest is already translating into adoption. TrendForce expects Google to adopt EMIB-T in 2027, while AWS is also testing EMIB technology. CoWoS-L, however, is expected to remain the mainstream AI packaging technology through 2028, supported by its greater maturity and higher yields, according to TrendForce. EMIB-T Substrate Race Heats Up as New Players Eye Entry As EMIB demand builds, substrate supply is emerging as another key pressure point. Speaking at Splunk’s .conf26 Global Broadcast earlier this month, Intel CEO Lip-Bu Tan identified advanced packaging as the company’s next major growth area while flagging substrates as a bottleneck. Intel even “has to prepay” to secure suppliers’ attention, he said, pointing to four major partners—two each in Japan and Taiwan. ZDNet reports that Intel’s EMIB-T substrate supply chain includes established players such as Japan’s Ibiden and Shinko Electric and Taiwan’s Unimicron. Ibiden, the world’s largest FC-BGA supplier, has reportedly secured upfront payments from major tech customers including Google, Amazon and Intel, the report suggests. Their head start could raise the bar for newcomers. An industry source cited by ZDNet says Ibiden and Unimicron have spent seven to eight years mass-producing Intel EMIB substrates, building up proven technology and manufacturing capabilities. Even so, Samsung Electro-Mechanics and LG Innotek are now reportedly targeting entry into the EMIB-T supply chain as they expand deeper into the high-value FC-BGA market. 💡More: pse.is/9n46d7 🔗

The #LPDDR6 race is heating up. After #CXMT announced mass production earlier this month, #Samsung has now scored an industry first—validating LPDDR6 on #Qualcomm’s Snapdragon 8 Elite Extreme Gen 6 at speeds of up to 10.7 Gbps.💡More: pse.is/9n5xlj 🔗

China’s A-share semiconductor profits jumped more than 6× YoY in 1H26. #DRAM maker #CXMT led in both revenue and profit, while AI demand is also lifting players like Cambricon and #SMIC. 💡More: pse.is/9n5z9d 🔗

#Micron reports earnings Sept. 30 after gross margin surged to a record 84.9% in 3QFY26. With soaring conventional memory prices fueling much of its first-half boom, can the rally last?💡More: pse.is/9mwpze 🔗

#TSMC’s #14A roadmap is closing in on #Intel. IC design sources reportedly say pilot production could kick off as early as 1Q27, while Intel’s official roadmap points to 2H27 for internal 14A products before a high-volume ramp in 2028.💡More: pse.is/9mxcxs 🔗

Samsung Electronics to Double HBM4 and HBM4E Production Next Year Samsung Electronics is expected to at least double its production of the HBM4 family next year compared with this year, including sixth generation high bandwidth memory (HBM4) and seventh generation HBM (HBM4E). This follows its plan to raise demand for "glass carriers," the glass supports that hold wafers while DRAM for HBM is thinned, to 2.5 times this year's level. According to the semiconductor industry on the 20th, Samsung Electronics will increase its outsourced cleaning volume of glass carriers, which are essential to the HBM production process, from 20,000 units per month this year to 50,000 units per month next year. Only 10,000 glass carriers per month were needed last year, which means the volume doubles this year versus last year and rises 2.5 times next year versus this year. A glass carrier is a support temporarily attached to the underside of a DRAM wafer for HBM to keep the wafer from warping or cracking while it is ground thin and holes are drilled through it. Because HBM must stack multiple DRAM dies within a limited thickness, wafer thinning technology and warpage control processes become more important as the stack count rises. HBM4 and HBM4E, for which Samsung Electronics is especially preparing to expand production, center on high stack products of 12-High and above. The industry's analysis is that, even after accounting for the fact that glass carriers are reused after cleaning and that usage varies with how they are deployed at each process step and with yield, a 2.5 times increase in the related volume makes it highly likely that HBM4 and HBM4E production will be at least double this year's level. In February this year, Samsung Electronics began mass production shipments of HBM4, which applies sixth generation 10nm class (1c) DRAM and a base die built on a 4 nanometer (nm, one billionth of a meter) process. In May, it also provided HBM4E 12-High samples to customers including Nvidia. The industry expects Samsung Electronics' HBM production scale, measured by monthly average wafer input, to grow nearly 40% from about 180,000 wafers this year to about 250,000 wafers next year. In terms of shipment mix by product, some also forecast that the HBM4 family will rise from around 40% this year to about 80% next year as HBM4E mass production gets into full swing. An industry official explained, "As Samsung ramps up HBM production, it appears to be placing HBM4, a high value added product, at the center."