$AMD | Why Bears CANNOT stop AMD going to $1,200 FY2027 🧵 Not Financial Advice! DYOR! I do own AMD shares! $AMD MC: $863B. At $529/share FY2027 PE is 21-26.4x $NVDA MC: $5.2T. At $215/share FY2027 PE is 20-23x AMD now has the best CPU GPU APU NPU, full SI solutions for all AI labs, Hyperscalers, and Enterprises. And I quoted Elon Musk recently stated: "Agentic demand is growing faster than I’ve ever seen anything grow" = Extreme Hypergrowth for CPUs AMD CPU Rack (Helion) will be shipping from November 2026. AMD Helios Rack is now shipping at scale to customers $META $MSFT @OpenAI @AnthropicAI G42 5C Humain TensorWave HPE Dell and many others. Dr. Su aims for 50%+ market share on CPU server and a major player of GPUs(analysts are projecting 20-25% market share) . AMD’s long standing investment in chiplet architectures is delivering structural advantages over @nvidia in the AI accelerator market, particularly visible in the Instinct MI455X versus Rubin comparison. AMD pioneered disaggregated designs with its EPYC and Ryzen lines, separating high performance compute dies from I/O and cache functions so that each can use the optimal process node. Leading edge nodes are used only where density and performance matter most, and more mature higher yield nodes are used elsewhere. This modular approach, stitched together via Infinity Fabric and advanced packaging, produces higher manufacturing yields on smaller dies, lower cost per yielded transistor, faster product iteration, and the ability to scale capacity simply by adding more chiplets. $NVDA has adopted multi die packaging, as in Blackwell’s two dies and Rubin’s dual compute dies joined by NV HBI, primarily as a workaround for reticle size limits, but it remains less modular and more performance oriented at the expense of cost and flexibility. Analysts note that AMD’s greater experience with chiplets can offset some interconnect power and performance penalties while enabling broader product segmentation and independent optimization of compute, memory, and I/O. These benefits appear most clearly in memory capacity and rack scale scaling. The MI455X, built from roughly two dozen chiplets including eight compute dies on TSMC 2 nm, fabric and cache dies on 3 nm, and associated I/O, supports 12 stacks of HBM4 for 432 GB of capacity and 23.3 TB/s peak bandwidth. By contrast, NVIDIA’s Rubin uses fewer stacks, typically eight, for 288 GB and lower effective bandwidth after the company reduced HBM4 pin speed from 11.7 Gbps to 9.3 Gbps. At the system level, a 72 GPU AMD Helios rack pools roughly 31 TB of HBM4 versus about 20.7 TB in NVIDIA’s Vera Rubin NVL72. The extra capacity and bandwidth density support larger models, longer contexts, and higher concurrency inference with less reliance on multi GPU sharding or offload, exactly the workloads that dominate current AI demand. Chiplet modularity also allows AMD to partition a single package into one large GPU, two smaller ones, or up to eight virtualized accelerators, adding deployment flexibility that a more rigidly paired multi die design does not match as easily. NVIDIA retains strengths in peak low precision matrix throughput on certain formats, its tightly integrated CUDA software ecosystem, and scale up networking maturity. AMD’s chiplet strategy, however, positions it as the more cost effective and capacity scalable alternative at a time when memory capacity and system level memory pools are becoming primary constraints for frontier models. The manufacturing flexibility of smaller dies also supports faster volume ramps once process yields stabilize, which matters as both companies fight for limited advanced packaging and HBM supply. On October 6, 2026, during a visit to Taipei and South Korea, AMD CEO Lisa Su told reporters that the company had already increased its supply through 2026 but that demand remained higher than available output. She stated that AMD plans to substantially increase its supply in 2027 and that the company could still use more capacity. Dr. Su explained that AMD now plans three to five years ahead with partners, rather than one or two years, so that wafer, packaging, and substrate capacity can expand in coordinated fashion. She met with Foxconn and planned meetings with TSMC, and she was scheduled to travel to South Korea to engage memory suppliers Samsung and SK Hynix. Su also indicated that AMD is increasing its multi billion dollar investment in the Taiwan supply chain beyond the more than 10 billion dollar commitment announced earlier in the year, underscoring the company’s effort to convert design advantages into higher volumes of Instinct GPUs and EPYC CPUs to meet sustained AI demand. In addition, to service this massive Agentic SI demand, AMD’s Helion is a purpose built open OCP rack reference design for agentic AI that prioritizes dense EPYC Venice CPU capacity for the orchestration, planning, tool calling, and multi step reasoning layers that dominate agent workloads. Its hyperscale configuration is CPU only and can reach 32,768 Zen 6 cores in a single rack by packing up to 128 high core count processors, allowing operators to run large fleets of agents while routing model inference to separate accelerator infrastructure such as Helios. The enterprise variant mixes CPU blades with a limited number of Instinct MI350P GPUs, up to 16 per rack, so the effective ratio can shift toward many CPUs serving far fewer GPUs. This architecture directly supports the industry shift Lisa Su has highlighted, in which the XPU to CPU ratio moves from highly GPU skewed figures such as 8-16 to 1 toward more balanced or even CPU heavier mixes as agentic systems proliferate. While most of the market chased peak training FLOPS and dense GPU clusters, Helion materializes the practical requirement for abundant general purpose cores to keep concurrent agents productive at scale, pairing the chiplet modularity of Venice with the high bandwidth HBM pools on the accelerator side. This complements the earlier memory and packaging advantages of the MI455X while aligning with Dr. Su’s October 2026 comments on expanding supply to meet demand for these full stack systems. Not Financial Advice! DYOR! I do own AMD shares!

$AMD | Why Bears CANNOT stop AMD going to $1,200 FY2027 🧵 Not Financial Advice! DYOR! I do own AMD shares! $AMD MC: $863B. At $529/share FY2027 PE is 21-26.4x $NVDA MC: $5.2T. At $215/share FY2027 PE is 20-23x AMD now has the best CPU GPU APU NPU, full SI solutions for all AI labs, Hyperscalers, and Enterprises. And I quoted Elon Musk recently stated: "Agentic demand is growing faster than I’ve ever seen anything grow" = Extreme Hypergrowth for CPUs AMD CPU Rack (Helion) will be shipping from November 2026. AMD Helios Rack is now shipping at scale to customers $META $MSFT @OpenAI @AnthropicAI G42 5C Humain TensorWave HPE Dell and many others. Dr. Su aims for 50%+ market share on CPU server and a major player of GPUs(analysts are projecting 20-25% market share) . AMD’s long standing investment in chiplet architectures is delivering structural advantages over @nvidia in the AI accelerator market, particularly visible in the Instinct MI455X versus Rubin comparison. AMD pioneered disaggregated designs with its EPYC and Ryzen lines, separating high performance compute dies from I/O and cache functions so that each can use the optimal process node. Leading edge nodes are used only where density and performance matter most, and more mature higher yield nodes are used elsewhere. This modular approach, stitched together via Infinity Fabric and advanced packaging, produces higher manufacturing yields on smaller dies, lower cost per yielded transistor, faster product iteration, and the ability to scale capacity simply by adding more chiplets. $NVDA has adopted multi die packaging, as in Blackwell’s two dies and Rubin’s dual compute dies joined by NV HBI, primarily as a workaround for reticle size limits, but it remains less modular and more performance oriented at the expense of cost and flexibility. Analysts note that AMD’s greater experience with chiplets can offset some interconnect power and performance penalties while enabling broader product segmentation and independent optimization of compute, memory, and I/O. These benefits appear most clearly in memory capacity and rack scale scaling. The MI455X, built from roughly two dozen chiplets including eight compute dies on TSMC 2 nm, fabric and cache dies on 3 nm, and associated I/O, supports 12 stacks of HBM4 for 432 GB of capacity and 23.3 TB/s peak bandwidth. By contrast, NVIDIA’s Rubin uses fewer stacks, typically eight, for 288 GB and lower effective bandwidth after the company reduced HBM4 pin speed from 11.7 Gbps to 9.3 Gbps. At the system level, a 72 GPU AMD Helios rack pools roughly 31 TB of HBM4 versus about 20.7 TB in NVIDIA’s Vera Rubin NVL72. The extra capacity and bandwidth density support larger models, longer contexts, and higher concurrency inference with less reliance on multi GPU sharding or offload, exactly the workloads that dominate current AI demand. Chiplet modularity also allows AMD to partition a single package into one large GPU, two smaller ones, or up to eight virtualized accelerators, adding deployment flexibility that a more rigidly paired multi die design does not match as easily. NVIDIA retains strengths in peak low precision matrix throughput on certain formats, its tightly integrated CUDA software ecosystem, and scale up networking maturity. AMD’s chiplet strategy, however, positions it as the more cost effective and capacity scalable alternative at a time when memory capacity and system level memory pools are becoming primary constraints for frontier models. The manufacturing flexibility of smaller dies also supports faster volume ramps once process yields stabilize, which matters as both companies fight for limited advanced packaging and HBM supply. On October 6, 2026, during a visit to Taipei and South Korea, AMD CEO Lisa Su told reporters that the company had already increased its supply through 2026 but that demand remained higher than available output. She stated that AMD plans to substantially increase its supply in 2027 and that the company could still use more capacity. Dr. Su explained that AMD now plans three to five years ahead with partners, rather than one or two years, so that wafer, packaging, and substrate capacity can expand in coordinated fashion. She met with Foxconn and planned meetings with TSMC, and she was scheduled to travel to South Korea to engage memory suppliers Samsung and SK Hynix. Su also indicated that AMD is increasing its multi billion dollar investment in the Taiwan supply chain beyond the more than 10 billion dollar commitment announced earlier in the year, underscoring the company’s effort to convert design advantages into higher volumes of Instinct GPUs and EPYC CPUs to meet sustained AI demand. In addition, to service this massive Agentic SI demand, AMD’s Helion is a purpose built open OCP rack reference design for agentic AI that prioritizes dense EPYC Venice CPU capacity for the orchestration, planning, tool calling, and multi step reasoning layers that dominate agent workloads. Its hyperscale configuration is CPU only and can reach 32,768 Zen 6 cores in a single rack by packing up to 128 high core count processors, allowing operators to run large fleets of agents while routing model inference to separate accelerator infrastructure such as Helios. The enterprise variant mixes CPU blades with a limited number of Instinct MI350P GPUs, up to 16 per rack, so the effective ratio can shift toward many CPUs serving far fewer GPUs. This architecture directly supports the industry shift Lisa Su has highlighted, in which the XPU to CPU ratio moves from highly GPU skewed figures such as 8-16 to 1 toward more balanced or even CPU heavier mixes as agentic systems proliferate. While most of the market chased peak training FLOPS and dense GPU clusters, Helion materializes the practical requirement for abundant general purpose cores to keep concurrent agents productive at scale, pairing the chiplet modularity of Venice with the high bandwidth HBM pools on the accelerator side. This complements the earlier memory and packaging advantages of the MI455X while aligning with Dr. Su’s October 2026 comments on expanding supply to meet demand for these full stack systems. Not Financial Advice! DYOR! I do own AMD shares!

Amazon withdraws plans for four data centers on the 122-acre former GWU Ashburn campus in Loudoun County after buying it for ~$427M #MacroEdge

$AMD | @MikeLongTerm was the only one calling for $GOOGL and @AMD CPU collab since 2024-2025. The best CPU IP will get the largest customers. It was only logical to connect the dots. Yes Agentic SI was not that good in 2024-2025, but 2026 is different. Agents are incredibly good today and can automate most workloads on CPUs. I chose to believe in Dr. Su, on what she said since 2022-2023. Most long time followers and subscribers already know this. @Google will still be buying EPYC Venice at large scale with AMD custom CPU. To rebalance the CPU : GPU ratio after 3-4 years and update old CPUs, it will require millions of EPYC to service Google internal agentic needs. To service Google customers, I'm afraid it would require google to purchase tens of millions of CPUs whether it is AMD EPYC or AMD custom CPU. Not Financial Advice! DYOR!

$AMD| $META Muse is pushing 4-8 CPU : 1 GPU ratio 🧵 1. “Make CPU Great Again” @Muse is the clearest example. Meta does not just run a chatbot on shared inference clusters. Each user gets an isolated Linux VM with its own browser, storage, CPU, and memory so the agent can browse, fill forms, compile code, run cron jobs, and keep state after the app closes. Community reports put a typical instance around 2 vCPU and 8 GB RAM, plus storage. Multiply that by millions of users on a generous free tier and the bill is racks of general purpose compute, not just more H100s or MI300X .The “Make CPU Great Again” captured a symptom, not the actual constraint. Agentic products like Muse and Instinct are not mainly a story about chips beating GPUs. They force hyperscalers, AI labs, and enterprises to treat persistent per agent computers as a first class line item in CapEx . In February 2026 AMD and Meta signed a multi-year deal for up to 6 GW of Instinct GPUs, with first gigawatt shipments in 2H 2026. That first wave is not GPUs alone. It is a custom MI450 class Instinct GPU plus 6th gen EPYC “Venice” CPUs on Helios racks that @AMD and Meta co-designed through the Open Compute Project. Meta is also a lead customer for the next EPYC generation, “Verano.” AMD has already shipped Meta millions of EPYC CPUs and earlier Instinct MI300/MI350 parts. @finkd framed the deal as compute for “personal superintelligence” and as diversification away from a single accelerator vendor. The 6GW is the dominating headline, but the actual partnership is co-design, co-engineer and co-optimize together. Meaning @Meta will be buying tens of millions of EPYC from AMD in the coming years, because scaling consumers Agentic will require massive ten million Muse class users is tens of millions of small CPU boxes, plus a much smaller pool of shared inference GPUs for the tokens those boxes request. Consumer agent fleets push that ratio toward 4-8 CPU : 1 GPU or past it on the sandbox tier, because the “computer per person” layer does not batch the way tokens do. Free tiers make it worse: Meta can give away 100 million tokens a week only if the VM behind those tokens is cheap enough to keep allocated. Muse’s product architecture is a dedicated Linux VM per user: browser, filesystem, Sentinel process, cron jobs, code compilation, sub-agents. That box is a CPU, memory, and storage problem. Inference of Muse Spark still wants GPUs. Keeping millions of isolated agent computers alive wants dense server CPUs. Dr. Lisa Su has been telling us that story explicitly since 2022: EPYC SKUs for agent sandboxes, AI host nodes, and general-purpose tool execution, with Venice going to 256 cores / 512 threads. Dr. Lisa Su has already said server CPU demand “far exceeded” forecasts because of agentic workloads, and AMD raised its server CPU market outlook from $120 billion to $220B+ industry target by 2030 and she aims for 50% market share of that. Enterprises follow the same logic at smaller scale. An OpenClaw or Instinct like agent on-prem is a 4–8 vCPU Linux box with a browser. A fleet of those is an EPYC purchase, not an B200 or Rubin purchase. AMD’s marketing and product split (sandbox density vs host node I/O vs general purpose) is aimed at that exact mix. 2. Why AMD? x86 compatibility for agent sandboxes. Muse, OpenClaw, and enterprise agents run Linux, Chromium, compilers, and random third party tools. Custom Arm CPUs win on cloud native efficiency. They lose some of that advantage when the workload is “give this agent a real computer.” EPYC’s core density and PCIe/memory bandwidth are the merchant answer to packing more VMs per rack. Meta is both design partner and volume customer. Helios sits on Meta’s Open Rack Wide spec. Muse’s scale out is therefore not a generic CPU RFP. It is incremental demand on a stack Meta already standardized with AMD. If Muse VMs land on the same generation of EPYC that hosts Instinct nodes, AMD sells twice per watt of Meta campus: accelerator dollars and sandbox dollars. The most expensive part of the product is keeping that machine isolated and busy: page loads, form fills, compiles, API calls, file I/O. Muse Spark inference is a burst on a shared GPU cluster. The VM is reserved CPU capacity. That is why Meta renting “a massive number of virtual machines” is a CPU shortage story. The same pattern shows up in the rest of the consumer stack. OpenClaw with a browser wants roughly 4 vCPU and 8 GB, not a GPU, unless you host the model locally. Instinct is waitlisted on compute while it hands every user a cloud machine they can text and call. Tool heavy agent traces in the literature put 50–90% of latency on CPU side tool processing; some vendor testing says seven of eight stages in a realistic agent pipeline run on the host, not the accelerator. GPU utilization drops while the agent waits on Chromium, a compiler, or an API. Adding more GPU does not fix that. Adding more cores/threads, DRAM, and VM density does. Density follows from concurrency, not from model size. One consumer does not need a dedicated GPU. They need a private address space that can stay up for hours. Ten million Muse class users is tens of millions of small CPU boxes, plus a much smaller pool of shared inference GPUs for the tokens those boxes request. Conclusion: The conclusion is that Dr. Lisa Su kept funding the unfashionable layer. In 2022 the market was already pivoting to GPUs. She still said, “We’ve said the datacenter represents our largest growth opportunity and the number one strategic priority for our company.” On Genoa she added, “It’s the highest performance datacenter processor, it’s the most efficient, and we’re delivering significantly better performance-per-watt than our competition.” Meta was already putting third gen EPYC into Open Compute servers. That was the bet: keep winning the general purpose socket even while Instinct chased NVIDIA. Agentic consumer products paid that bet off. A Muse or Instinct user is not a batched token stream. They are a reserved Linux computer with a browser, tools, sandbox, and Sentinel that only sometimes wakes a GPU. In March 2026 Su said, “We’re seeing a significant CPU demand, frankly, as a result of the inference demand picking up,” and then, “the CPU portion of the business has actually far exceeded my expectations in terms of demand.” She told the same audience that top customers were saying CPU compute sitting alongside AI “was perhaps something that was under forecasted.” AMD then raised the server CPU TAM and split EPYC into GPU host nodes, high frequency head nodes, and dense agent sandbox parts. Venice is the sandbox chip: 256 cores, 512 threads, first PCIe Gen 6 on a CPU, tuned for agents per watt, per dollar, and per rack. Versus NVIDIA Vera, EPYC 9996(Venice) is 1.2x per core and more than 2x platform SPECrate integer, and roughly 3.3 to 3.4x throughput in a modeled 100 kW rack. Versus Intel Xeon 6980P, the same part is in the 1.8x to 3x range on the enterprise and HPC suites AMD cites. Versus Arm AGI, AMD has a large per core gap. The direction matches the product: more cores in an x86 box that already runs Chromium, compilers, and enterprise tools without a platform change. That is what a consumer agent VM needs. Dr. Su was early on not abandoning the socket that agents would have to live on years after. NVIDIA still owns more GPU dollars. Intel and custom Arm still take a large share of general cloud cores. AMD is the merchant vendor that kept the best high core x86 CPU line through the GPU years, then sold Meta both that CPU and the Instinct GPU in the same Helios rack. Consumer agentic being CPU dense is why that 2022 decision now looks like winning strategy for AMD long term shareholders Not Financial Advice !DYOR!

Interview with a Former MediaTek employee on why a few hyperscalers will determine how the AI chip market evolves ($NVDA, $AMD, $AVGO, $AMZN, $GOOGL): 1. The expert describes $AMD's possible role in $GOOGL's TPU program as an early-stage discussion tied to v10, with nothing confirmed for v11. $AMD would mainly bring packaging and heterogeneous integration expertise, plus CPU IP, since placing CPU cores alongside the TPU could cut communication overhead and improve latency for agentic AI and reinforcement learning workloads. He does not see this as $AMD replacing $AVGO, whose significant share in the TPU is not in danger, but as part of $GOOGL's consistent strategy of diversifying its vendors. 2. He puts $GOOGL's external TPU hardware revenue at about $8 billion this year, rising to roughly $51 billion in 2027 and around $104 billion in 2028. $GOOGL began recognizing external TPU sales in Q2 of this year, and management has said most revenue from existing agreements will be recognized in 2027. The expert notes these sales sit inside $GOOGL's roughly $514 billion cloud backlog, which could scale TPU system sales from single-digit billions in 2026 to tens of billions in the following years. 3. The expert agrees that $NVDA can keep growing in dollar terms even as custom silicon takes share, because total AI demand is expanding so quickly. The real risk is the precedent rather than the loss of any single customer. If $GOOGL shows that custom accelerators have compelling economics, $MSFT and $AMZN may gain even more confidence in their own ASIC programs, which could pressure $NVDA's long-term share and pricing power. 4. According to the expert, $MSFT is the largest hyperscaler buyer of $NVDA GPUs, driven by heavy Azure AI demand, with $META also highly exposed because it relies on GPUs for large-scale training and inference despite its MTIA effort, which the expert says could have gone better. $AMZN is running both strategies, deploying $NVDA GPUs alongside Trainium and Inferentia, while $GOOGL is the clearest custom ASIC counterexample, remaining a meaningful $NVDA customer but a smaller one than $MSFT and $META. 5. The expert notes that more than half of $NVDA's data center revenue comes from these four hyperscalers, with 2025 shares of roughly 18% from $MSFT, 13% from $META, 9% from $AMZN, 9% from $GOOGL, and about 5% from $ORCL. The expert expects that split to shift in the coming year, with $GOOGL's dependency on $NVDA falling while $MSFT, $META, and $AMZN stay heavily reliant. 6. He expects CapEx at major cloud providers to keep rising in absolute dollars, from roughly $880-900 billion this year to about $1.3 trillion next year and around $1.5-1.7 trillion in 2028. The expert is confident the 2028 dollar increase will be larger than the 2027 increase, even though the percentage growth rate is slowing. found on @AlphaSenseInc

BREAKING $AMD Dr. Lisa Su Full interview in Taiwan🚨🚀 In this public interview, @AMD CEO Dr. Lisa Su stated her goals coming to Taiwan 2nd time since May 2026. Interview Date is October 10th 2026!!!! ~ It is important for us to work with key suppliers and partners ~Foxconn is a great partner and we met with other partners and customers ~It is a very busy trip for 1 day ~We increased our supply in 2026, but Demand is much higher than supply, we are increasing supply with TSMC and our substrate partners. We are excited to see more progress from Personal AI(Muse,Dots). ~We definitely can use more supply CPU GPU and All of AI demand. We are seeing a lot of progresses being made. ~ We have great partnership with all memory partners. We want to ensure we have enough memory for server as well as PC. We want to plan for demand carefully with our partners and customers ~ We have VERY VERY HIGH Demand for next few years, and we need more capacity. TSMC Arizona capacity been doing very well for us, and we are looking for more capacity worldwide. ~We partner with the largest suppliers and we plan to keep our business Fabless. Before we plan for 1-2 years, but now we (AMD) are planning for 3-4-5 years. We need all capacity come up at the same time ~Demand for AMD Chips is VERY HIGH. ~We seen tremendeous progresses on AI, we can innovate and keep it safe, we can do both. We can work together and innovate as fast as possible ~I'm very excited on our @theworldlabs acquisition with Dr. @drfeifei. We have much more software and hardware interaction, so very excited to see Worldlabs and AMD coming together. ~We believe AI is incredibly good for the world. With New technology, we will some work on AI safety innovation. Companies can learn from each other, together we can have capable AI and safe AI. ~You are going to see AI for Enterprises, Researches, Physical Applications. We will have many winners in this space. ~ We think it is good to have geographical diversity. ~We are looking for more Wafer Capacity from TSMC and partners. ~Our Venice has very high adoption rate from Largest Hyperscalers, AI labs, Enterprises customers and partners. We have great partnership with TSMC and we are confident to get supply we need. ~Advanced packaging is super important for us and we are looking for more innovation and how we can bring more capacity to service demand. We do need more capacity overall. ~$10B investment in Taiwan is on track and we plan to increase it to increase supply. ~Helios is on track and we continue to ramp even more in next few quarters. Source: ETtoday

$AMD | Why Bears CANNOT stop AMD going to $1,200 FY2027 🧵 Not Financial Advice! DYOR! I do own AMD shares! $AMD MC: $863B. At $529/share FY2027 PE is 21-26.4x $NVDA MC: $5.2T. At $215/share FY2027 PE is 20-23x AMD now has the best CPU GPU APU NPU, full SI solutions for all AI labs, Hyperscalers, and Enterprises. And I quoted Elon Musk recently stated: "Agentic demand is growing faster than I’ve ever seen anything grow" = Extreme Hypergrowth for CPUs AMD CPU Rack (Helion) will be shipping from November 2026. AMD Helios Rack is now shipping at scale to customers $META $MSFT @OpenAI @AnthropicAI G42 5C Humain TensorWave HPE Dell and many others. Dr. Su aims for 50%+ market share on CPU server and a major player of GPUs(analysts are projecting 20-25% market share) . AMD’s long standing investment in chiplet architectures is delivering structural advantages over @nvidia in the AI accelerator market, particularly visible in the Instinct MI455X versus Rubin comparison. AMD pioneered disaggregated designs with its EPYC and Ryzen lines, separating high performance compute dies from I/O and cache functions so that each can use the optimal process node. Leading edge nodes are used only where density and performance matter most, and more mature higher yield nodes are used elsewhere. This modular approach, stitched together via Infinity Fabric and advanced packaging, produces higher manufacturing yields on smaller dies, lower cost per yielded transistor, faster product iteration, and the ability to scale capacity simply by adding more chiplets. $NVDA has adopted multi die packaging, as in Blackwell’s two dies and Rubin’s dual compute dies joined by NV HBI, primarily as a workaround for reticle size limits, but it remains less modular and more performance oriented at the expense of cost and flexibility. Analysts note that AMD’s greater experience with chiplets can offset some interconnect power and performance penalties while enabling broader product segmentation and independent optimization of compute, memory, and I/O. These benefits appear most clearly in memory capacity and rack scale scaling. The MI455X, built from roughly two dozen chiplets including eight compute dies on TSMC 2 nm, fabric and cache dies on 3 nm, and associated I/O, supports 12 stacks of HBM4 for 432 GB of capacity and 23.3 TB/s peak bandwidth. By contrast, NVIDIA’s Rubin uses fewer stacks, typically eight, for 288 GB and lower effective bandwidth after the company reduced HBM4 pin speed from 11.7 Gbps to 9.3 Gbps. At the system level, a 72 GPU AMD Helios rack pools roughly 31 TB of HBM4 versus about 20.7 TB in NVIDIA’s Vera Rubin NVL72. The extra capacity and bandwidth density support larger models, longer contexts, and higher concurrency inference with less reliance on multi GPU sharding or offload, exactly the workloads that dominate current AI demand. Chiplet modularity also allows AMD to partition a single package into one large GPU, two smaller ones, or up to eight virtualized accelerators, adding deployment flexibility that a more rigidly paired multi die design does not match as easily. NVIDIA retains strengths in peak low precision matrix throughput on certain formats, its tightly integrated CUDA software ecosystem, and scale up networking maturity. AMD’s chiplet strategy, however, positions it as the more cost effective and capacity scalable alternative at a time when memory capacity and system level memory pools are becoming primary constraints for frontier models. The manufacturing flexibility of smaller dies also supports faster volume ramps once process yields stabilize, which matters as both companies fight for limited advanced packaging and HBM supply. On October 6, 2026, during a visit to Taipei and South Korea, AMD CEO Lisa Su told reporters that the company had already increased its supply through 2026 but that demand remained higher than available output. She stated that AMD plans to substantially increase its supply in 2027 and that the company could still use more capacity. Dr. Su explained that AMD now plans three to five years ahead with partners, rather than one or two years, so that wafer, packaging, and substrate capacity can expand in coordinated fashion. She met with Foxconn and planned meetings with TSMC, and she was scheduled to travel to South Korea to engage memory suppliers Samsung and SK Hynix. Su also indicated that AMD is increasing its multi billion dollar investment in the Taiwan supply chain beyond the more than 10 billion dollar commitment announced earlier in the year, underscoring the company’s effort to convert design advantages into higher volumes of Instinct GPUs and EPYC CPUs to meet sustained AI demand. In addition, to service this massive Agentic SI demand, AMD’s Helion is a purpose built open OCP rack reference design for agentic AI that prioritizes dense EPYC Venice CPU capacity for the orchestration, planning, tool calling, and multi step reasoning layers that dominate agent workloads. Its hyperscale configuration is CPU only and can reach 32,768 Zen 6 cores in a single rack by packing up to 128 high core count processors, allowing operators to run large fleets of agents while routing model inference to separate accelerator infrastructure such as Helios. The enterprise variant mixes CPU blades with a limited number of Instinct MI350P GPUs, up to 16 per rack, so the effective ratio can shift toward many CPUs serving far fewer GPUs. This architecture directly supports the industry shift Lisa Su has highlighted, in which the XPU to CPU ratio moves from highly GPU skewed figures such as 8-16 to 1 toward more balanced or even CPU heavier mixes as agentic systems proliferate. While most of the market chased peak training FLOPS and dense GPU clusters, Helion materializes the practical requirement for abundant general purpose cores to keep concurrent agents productive at scale, pairing the chiplet modularity of Venice with the high bandwidth HBM pools on the accelerator side. This complements the earlier memory and packaging advantages of the MI455X while aligning with Dr. Su’s October 2026 comments on expanding supply to meet demand for these full stack systems. Not Financial Advice! DYOR! I do own AMD shares!