Three ETFs Targeting the Next AI Infrastructure Bottlenecks The first wave: own the obvious AI leaders. But investors may now need to ask where the bottlenecks are forming. Three ETFs offer a useful framework for this shift: SMH, DRAM, and EUV. Each targets a different layer of the AI infrastructure chain. SMH gives broad semiconductor exposure, DRAM isolates the memory bottleneck, and EUV targets lithography, photonics, and optical infrastructure. SMH is the most institutionalized option. It provides exposure to large semiconductor and semiconductor-equipment companies rather than one narrow choke point. Key holdings include $NVDA at 17%, $TSM at 10%, $AVGO at 8%, $INTC at 8%, $AMD at 7%, $MU at 6%, $TXN at 5%, and $KLAC at 4%. This makes SMH the most natural core holding of the group for investors who want exposure to the full AI hardware stack. It covers GPUs, foundries, custom silicon, CPUs, memory, analog chips, and semiconductor manufacturing tools. The trade-off is lower purity. SMH is not a single bottleneck bet. It is a broad semiconductor ecosystem bet. DRAM is more targeted. It is designed around the AI memory squeeze, with exposure to HBM, DRAM, NAND, and storage demand. The fund is highly concentrated. Its largest positions are SK Hynix at 28.15%, $MU at 27.16%, and Samsung at 19.67%. Together, these companies dominate the global memory supply chain. Smaller holdings such as Kioxia, $SNDK, $STX, $WDC, Nanya, and Winbond add exposure across NAND, SSDs, HDDs, and specialty memory. DRAM is arguably the cleanest expression of the AI memory bottleneck. It is also more momentum-driven and concentrated than SMH, with a higher 0.65% expense ratio. EUV is the most specialized and higher-risk ETF in the group. It focuses on the “light layer” of AI infrastructure: photonics, EUV lithography, optical networking, semiconductor inspection, and precision manufacturing tools. Holdings include $TSM at 9.52%, $ASML at 7.97%, $GLW at 5.19%, $LRCX at 4.98%, $AMAT at 4.84%, $LITE at 4.46%, $CIEN at 4.32%, and $KLAC at 4.07%. AI data centers increasingly face limits around power, bandwidth, packaging, and interconnect speed. Photonics and advanced lithography may become critical as compute demand scales. Framework: SMH = core AI semiconductor exposure DRAM = memory bandwidth and capacity bottleneck EUV = lithography, photonics, and optical infrastructure bottleneck