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Software Engineer 💻 | Blockchain & Cryptography Enthusiast 🔗 | Transforming concepts into code | Exploring the future of decentralized tech

Joined February 2022
Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)Photo by CipherProof (@CipherProof)
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Very excited to share Genie 4, our incredible interactive world model, bringing together real-time physics, reasoning, and audio! Simulations within simulations, makes you wonder just how deep the rabbit hole goes... I have a feeling we will be finding out soon enough...
This is Genie 4, our most realistic and interactive world model yet. 🌐 Explore dynamic environments in real time to see how the scene responds, sounds, and how the people in it move, react, and speak.
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$SKHY just reported some absolutely RIDICULOUS earnings! The company reported $78.9 billion in Q3 revenue, beating estimates of $74.8 billion and growing 328% year over year. Operating profit surged 632% to $62.8 billion, with operating margins hitting a RECORD 80%. Even more impressive, revenue jumped 32% sequentially while operating profit increased 38%. DRAM pricing rose nearly 30% quarter over quarter, while NAND pricing increased roughly 25%. But here’s where things get really interesting. SK hynix expects memory demand to OUTPACE supply through 2030. The company is forecasting DRAM demand growth in the mid-20% range next year and NAND demand growth in the high teens. It’s also signed long-term agreements with 14 major customers, including large cloud providers, securing more than 50% of its planned capacity for 2027 and 2028. Meanwhile, HBM4 is expected to surpass HBM3E in shipment and revenue share during Q4. This is exactly why I’ve been so bullish on the memory trade. AI infrastructure spending is creating enormous demand for memory, and manufacturers are benefiting from both higher volumes and significant pricing power. And with more than half of SK hynix’s capacity for the next two years already secured, this isn’t just a short term demand spike. We’re seeing customers lock in supply YEARS in advance.
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SK hynix has begun discussions with its supply chain to prepare for adoption and production of "iHBM," a next generation technology designed to reduce heat in HBM, according to Korean media reports. iHBM places thermal control elements (ICE) in the signal interconnect region of the base die, creating a new path for heat to escape. SK hynix claims this can cut thermal resistance by more than 30%. iHBM uses a wafer level packaging (WLP) process built on Advanced MR-MUF, the signature process SK hynix already uses to stack HBM dies and fill the gaps between them in a single step. As a result, iHBM is expected to rely on a materials, parts, and equipment supply chain similar to that of existing HBM. SK hynix has reportedly set a target of applying iHBM starting with HBM5. etnews.com/20261021000240
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According to Korean media, one Korean brokerage just ran the bear case on Samsung and SK Hynix. DS Investment Securities assumed DRAM prices fall 20% in 2028, another 10% in 2029 and 5% more in 2030. Even then, Samsung's operating profit only falls 7% to 12% from 2027 levels. SK Hynix falls 12% to 18%. HBM is now a much bigger part of the mix, and that keeps profits far above past downturns. The analyst put it simply: "Now is the time to take advantage of the market's excessive pessimism and increase exposure."
Samsung is teaming up with its biggest foundry rival to build Nvidia's next memory chip. According to Korean media, Samsung will use $TSM's 3nm process for the base die in $NVDA's custom NVHBM, at Nvidia's request. The base die is the logic layer at the bottom of the HBM stack. Nvidia moved its memory controller into it, which frees up room on the GPU for more compute. Nvidia reportedly wants the same TSMC base die across Samsung, SK Hynix and $MU to standardize performance. Samsung is also testing its own 2nm process in case demand outgrows TSMC's capacity. It is the first time Samsung and TSMC will work together on making HBM itself.
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$SKHY trading at a 3.94x multiple is pure comedy that’s even cheaper than $MU at 4.21x at these valuations, both companies could retire their entire float in 3 to 4 years just off pure cash flow the market is completely disconnected from reality here.
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$DELL CEO Michael Dell says memory shortage is going to “get worse” next year with ~$95B in AI server backlog and DRAM supply still limiting deliveries. With new memory fabs unlikely to provide meaningful relief until 2029 or 2030, the 2027 oversupply fears weighing on $MU and $SKHY look really disconnected from what customers are actually seeing.
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$MU $SKHY I think Samsung, SK Hynix, Micron & CXMT will all be making a lot of DRAM in 2028, not just China. The difference: the memory trio will be shipping HBM5, DDR6 and next gen 3D DRAM architectures (2029+) into AI data centers. CXMT is still generations behind, selling mostly into China and mostly to consumers. And not everyone will buy Chinese DRAM. Just like Americans aren’t buying Chinese EVs. 🙃 Section 301. 50% tariff on Chinese chips today. Another one scheduled for June 2027. CXMT already on the Pentagon’s list.
China will be making a LOT of RAM in 2028
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Smarter AI starts with moving less data. 💡 Memory-centric computing brings processing closer to data, helping improve performance and energy efficiency. Discover why memory is central to the future of AI. 🔎 🔗 news.skhynix.com/en/ai-ecosy… #SKhynix #AI #MemoryCentricComputing
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🚨SK HYNIX'S HBM4E REACHES 48GB IN 12 LAYERS, FOUR FEWER THAN HBM4, AS HBM5 CLEARS VALIDATION ON TSMC COWOS SEOUL, Sept. 29 — SK hynix ($SKHY) has already validated HBM5 on TSMC's ($TSM) CoWoS packaging, two generations ahead of the HBM4 now going into Nvidia's ($NVDA) Vera Rubin, and the generation in between fits more memory into fewer layers. The company disclosed the work in a Sept. 28 newsroom post. At TSMC's Open Innovation Platform (OIP) conference in Santa Clara on Sept. 23, SK hynix won Partner of the Year in the "3DFabric-HBM Integration" category for the second year running, this time for "a collaboration that validated HBM5 on the basis of TSMC's CoWoS." Its Package Development organization and TSMC "carried out validation together from the earliest stages," the company said. DIGITIMES reported the award on Tuesday. What SK hynix put on the stand in Santa Clara: — A Vera Rubin superchip carrying SK hynix 12-high 36GB HBM4 around the Rubin GPU and 96GB of SOCAMM2 as main memory for the Vera CPU. — Beside it: 12-high 48GB HBM4E, 16-high 48GB HBM4 and 12-high 36GB HBM3E, plus a 192GB SOCAMM2 module. — Nvidia's spec sheet lists 288GB of HBM4 at 19.2TB/s per Rubin GPU, and 20.7TB of HBM4 across one Vera Rubin NVL72 rack. — Server DRAM on display: a 256GB 3DS RDIMM, a 128GB MRDIMM and a 64GB RDIMM built on the 1c process, SK hynix's sixth-generation 10nm-class node. — In a joint session with Cadence, PCIe design engineer Daesik Park projected the PCIe-based eSSD market growing from 509EB in 2026 to 1,933EB in 2030, about 3.8 times. SK hynix tied the award to how HBM is now built. "As HBM advances through successive generations, raising its stack count and bandwidth, fully realizing these gains in performance requires close coordination with the advanced packaging technology that integrates it into an actual AI accelerator," the post said. Park added that SK hynix has designed SSD controllers on TSMC processes since PCIe Gen 3 and is preparing chiplet-based controllers, split into UCIe-linked chiplets, for Gen 6 and Gen 7. HBM3E and both HBM4 parts work out to 3GB, or 24Gb, per DRAM die; the 12-high HBM4E works out to 4GB, or 32Gb, a third more per die, which is how it reaches the same 48GB as the 16-high HBM4 with four fewer layers. Nvidia's 288GB per Rubin GPU divides into eight of the 36GB stacks, and the same eight sites filled with 12-high HBM4E would hold 384GB. That is another 33% of memory per GPU sitting in a part SK hynix is already showing, with HBM5 qualified on the package it will ride. Memory per GPU keeps climbing through the next two product cycles, and $SKHY is shipping into Rubin while both of those generations line up behind it on $TSM CoWoS.
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$SKHY VALIDATED HBM5 WITH $TSM SK Hynix has already validated HBM5 with TSMC’s CoWoS packaging, even as HBM4 is only now entering Nvidia Vera Rubin systems SK Hynix disclosed the milestone after receiving TSMC’s 3DFabric-HBM Integration Partner of the Year award on September 23 HBM development is becoming increasingly tied to packaging co-design. As stacks get taller and faster, memory vendors can no longer develop HBM independently and then simply hand it off to the foundry SK Hynix says it is working with TSMC from the early validation stages because HBM performance increasingly depends on integration with the GPU and the CoWoS package
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SK HYNIX (000660.ks) is even cheaper than I thought... their 100% owned subsidiary Solidigm might be coming public soon at $150B+ valuation SK HYNIX currently has ~$50B of cash and will generate at least $220B+ of net income over the next 4 quarters and $350B+ of net income over the next 6 quarters (through end of CY2027). If you take the $150B+ from Solidigm off their current $1 trillion market cap... and include the cash they have now plus the cash they're going to generate over the next 6 quarters (though end of CY2027)... then SK Hynix is trading at less than 2x 2027 net income (perhaps under 1.7x CY2027 net income) -- wild times in memory land :) $SKHY On top of that, SK SQUARE (top 5 position for us)... owns 20% of all SK HYNIX shares and trades at 40-45% discount to NAV... which means you're buying SK SQUARE (402340.ks) at less than 1.5x 2027 net income (perhaps closer to 1.0x CY2027 net income) Feel free to check my math... I'm exhausted right now and my brain might be playing tricks on me.
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$SKHY Is Expanding Beyond HBM SK Hynix is developing Processing-in-Memory (PIM), which processes data inside or near memory to reduce data movement, latency, and power consumption The company claims PIM can deliver 300× the memory capacity of SRAM in the same chip area and is exploring hybrid bonding to stack compute and memory dies without sacrificing density Meanwhile, High Bandwidth Flash (HBF) combines 3D NAND density with HBM-style interconnects to deliver higher capacity at lower cost, targeting long-context and large-batch inference SK Hynix is also developing SALT-KV, software that distributes KV cache across HBM, DRAM, and SSDs to reduce dependence on expensive memory
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At AI Infra Summit 2026, @SKhynix presented a “New Spectrum” of solutions for evolving AI workloads. From HBF and PIM to SALT-KV, discover how SK hynix is advancing AI infrastructure for the inference and Agentic AI era. 🔗news.skhynix.com/en/ai-infra… #SKhynix #AIInfraSummit
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Trump calling @JensenHuang live during @theallinpod interview. “The grt thing about Jensen is that he can create the best AI chip in the world but can’t figure out how to put me on speaker phone.” They agree that AI is safe, grt for jobs, economic growth & natl security. 😂🇺🇸🚀
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Advanced memory is foundational to the next generation of AI.  Congratulations to @SKhynix on this milestone in Indiana and their continued investment in U.S. semiconductor manufacturing.
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$SKHY Very Interesting. SK Hynix has started a research & development in CPO. Rumor is: $MU is also following suit on Optical Interconnects. Seems like AI Memory Roadmap is far from done. “SK hynix is moving from a memory supplier to a bigger role in the AI infrastructure. According to the company, it has teamed up with leading researchers worldwide to lay out a roadmap for co-packaged optics (CPO) in the journal Nature Electronics.” “As noted by SK hynix, in the long term, CPO could extend optical interconnects directly to the memory interface, overcoming the physical limits of conventional packaging. Thus, its proposed optics-centric architecture uses a photonic interposer to directly link memory and processors, improving system-wide data movement efficiency.” “Notably, beyond its HBM leadership, SK hynix’s paper tackles data bottlenecks at the rack and pod levels, outlining an optics-centric architecture that links memory and processors through optical interconnects.” “As hyperscale AI clusters scale to thousands of GPUs and HBM stacks, conventional copper links are hitting their limits, with higher speeds and longer distances driving up power consumption, latency and signaling complexity, SK hynix explains, adding that this is creating a new bottleneck: the bandwidth wall, which increasingly constrains data movement across AI systems.” “Against this backdrop, CPO addresses the challenge by integrating optical transceivers (TRx) directly into the processor package, shortening high-speed electrical paths while using optical links for longer-distance data transfer.”
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Published in Nature Electronics, a new paper from @SKhynix and University of Virginia researchers explores how CPO can overcome the “bandwidth wall” through optical connectivity. 🔗 Read the full story below. news.skhynix.com/en/cpo-in-n… #SKhynix #CPO #AIInfrastructure
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Cathie Wood says to avoid memory stocks like $MU $SNDK and $SKHY. If you were not bullish Memory stocks, you should be now. Cathie Wood is even better than inverse Cramer. Her $ARKK flagship innovation ETF is flat YTD, while AI stocks have ripped. Mrs. Innovation missed the biggest tech innovation paradigm. She was a one hit wonder during the 2021 bubble and hasn't had a win since, $ARKK is still down 50% from the highs.
Cathie Wood says she avoids memory stocks like $MU and $SKHY because she still sees HBM as the most cyclical and commoditized part of the semiconductor stack. Her bigger point is that inference architectures from $CBRS and $NVDA via Groq can reduce or eliminate the need for HBM which makes today’s memory pricing surge look more temporary than structural. As she puts it when technology costs “triple or quadruple” engineers eventually design around the bottleneck and she believes inference is already starting to do exactly that.
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