Andes honors Quintauris as our “2026 Partner of the Year”! Celebrating our collaboration in driving ISO 26262 certified AndesCore™ processors into automotive reference platforms for safe, scalable #RISCV adoption. Read more: andestech.com/en/?p=56664

As an early adopter, Andes collaborated with ChipAgents to bring #AgenticAI into processor engineering—streamlining workflows and cutting verification cycles! More: pse.is/9k9ys4

🚀 Join Andes at TECIF 2026 in Antwerp, Belgium! Catch Frankwell Lin’s Keynote: Leverage RISC-V to Strengthen Your High Tech Competitiveness and explore new semiconductor synergy between Taiwan & Europe. 🔗 tecif.tw/

Proud to announce the launch of #RVBuilder📣 It is based on Visual Studio Code (VS Code), bringing Andes’ industry-leading toolchain and advanced debugging capabilities to the RISC-V community and making advanced tools more accessible to developers! More: pse.is/9gptjv

Excited to announce AndesCore™ D23-SE has achieved ISO 26262 ASIL-B & ASIL-D certification, expanding our safety-certified RISC-V portfolio for automotive & industrial use🎉Enables next-gen systems with greater confidence and faster certification! More: pse.is/9gp3hl

RISC-V is taking the open road. 🚗 See how RISC-V is enabling automotive innovation across safety, AI, and customized computing. Watch Darren Jones of Andes Technology present “ASIL Safety: More Than DCLS.” Watch the presentation: youtube.com/watch?v=yUmAtbLI… #RISCV #Automotive

Andes is bringing Transformer AI closer to the edge. The latest AndesAIRE™ AnDLA™ I370 v2.0 and NN SDK v1.2.0 support advanced ViT, VLM, and SLM workloads for power- and cost-constrained edge devices. Learn more: andestech.com/en/2026/08/03/… #RISCV #EdgeAI #AIAcceleration

Thrilled to announce the strategic collaboration between Andes & Mirabilis Design! Together, we're bringing validated system-level models for Andes RISC-V processor IP to enable faster architectural optimization and more efficient SoC development 🎯More: pse.is/9d7n5v

Meta is bringing its custom AI chip, Iris, into production this Sep. Google has TPUs, AWS has Trainium and Inferentia, and Microsoft has Maia. For large-scale inference, custom silicon can mean lower costs and less dependence on a single supplier. #CustomSilicon #AIInfrastructure

Congrats @dMatrix_AI — our Most Valuable Customer of the Year at RISC-V Now! 2026. Andes' AX46MPV vector RISC-V CPU powers its next-gen Raptor accelerator alongside 3DIMC tech for efficient LLM inference at scale. 🎥 Satyam's talk: youtu.be/Qrf8wpXhcA4 #RISCV #AIInference

39% performance gain from a 0.23% cache miss rate. 6% gain from a 1.99% miss rate. Same CPU. Same feature. Opposite results. Turns out miss rate isn't the thing that matters — it's whether the misses can overlap. New analysis from Andes:edn.com/memory-wall-why-cach… #RISCV #AIChips

Excited to announce the signing of a strategic IP licensing agreement between EdgeAI Inc. and Andes! This partnership aims to deliver a breakthrough in energy efficiency and latency for the rapidly growing Edge AI sector🎯More: pse.is/98ve63

Thrilled to announce our major milestone - Global cumulative shipments of customer SoCs powered by Andes CPU IP have officially surpassed 20 billion units🎯Proving the reliability of our CPU IP, implementation, and software support at scale🙌More: pse.is/98qcr3

Excited to announce the partnership between Axelera AI & Andes🙌The integration of Andes AX65 into Axelera AI’s Europa AI Platform marks a significant milestone in the mission to democratize AI! See how RISC-V works in a new era of edge intelligence🚀More: pse.is/95pyyl

GSOC Solutions and Andes Technology announced a strategic partnership to expand RISC-V CPU options for configurable SoC and chiplet platforms🎉Giving customers more trusted, market-proven choices to build next-gen silicon for demanding applications! More: pse.is/9536k6

The strategic collaboration between OSYX Technologies and Andes on RISC-V virtualization! This paves the way for broader virtualization support across Andes processors and highlights RISC-V’s continued maturation toward production-ready platforms🎯More: pse.is/92uhv6

Our talk at Design And Reuse IP-SoC Silicon Valley 2026 was a success. Marc Evans presented “RISC-V Now! Adaptation Velocity at AI Scale,” highlighting how RISC-V is driving AI innovation. Great to join industry leaders shaping the future of semiconductors. #RISCV #AI

Thanks to our customers, partners & attendees who made RISC-V Now! a success. From strong community momentum to a standout Deep Dive Day, RISC-V is happening now. Excited for the commercial breakthroughs ahead. #RISCV #Semiconductor

Come eat, hang out, & check out what’s next in AI & silicon @ RISC-V Now! We've got deep-dive sessions & a full day of expert talks & panels. Connect with industry leaders, learn, & be part of where RISC-V commercial happens. 4/20-21 in San Jose, CA. Reg: eventbrite.com/e/risc-v-now-…

RISC-V Now! brings the full story, from AI & datacenter to automotive & edge, in one day. Hear from the engineers building real systems, and don’t miss the expert panel on deploying RISC-V in high-performance production. April 21 | San Jose, CA Register: eventbrite.com/e/risc-v-now-…